1. Field of the Invention
The present invention relates generally to semiconductor devices and, more particularly, to a discharge device that, when a large electrical charge is accumulated thereupon during a semiconductor fabrication process, is designed to transfer the charge to prevent, or at least minimize, circuit element failures.
2. Description of the Related Art
The fabrication of a semiconductor device, such as a dynamic random access memory (DRAM), begins with a thin semiconductor wafer. Such semiconductor wafer may be subjected to numerous processing steps before a completed semiconductor device is created. Some of these processing steps, particularly those involving the use of an electric field such as plasma etching or ion implantation, may cause an unwanted electrical charge to accumulate on electrically isolated regions of charge accumulating material that have been formed upon the silicon wafer, i.e., those regions of conductive or semiconductive material having no electrically conductive coupling to the silicon wafer. Thus, a voltage may be established between such electrically isolated regions of charge accumulating material and the wafer itself. This can occur, for example, when the semiconductor wafer is electrically grounded during processing and the electrically isolated layers on the wafer have no path for releasing an accumulated charge to the ground potential of the wafer.
Problems may arise if such electrically isolated regions of charge accumulating material acquire a substantial charge during various processing stages. Such an accumulated charge could lead to the catastrophic breakdown of certain insulative elements, such as capacitor dielectrics, that are formed upon the silicon wafer. For example, the upper cell plate of a memory array within a DRAM device may serve as a common node for a large number of capacitive cells. Because of its relatively large size, this cell plate may develop a substantial charge, particularly during processes such as plasma etching, wherein a large amount of RF energy is applied to the wafer. If this accumulated charge is great enough, it may be dissipated through breakdown of the dielectric layer within one or more capacitors of the memory array. This could render the entire DRAM semiconductor device unusable, or at least require further processing to isolate damaged cells.
The problem of capacitive cell breakdown is exacerbated as the semiconductor industry utilizes increasingly thin oxide, nitride, and other insulative layers in an effort to make semiconductor devices more compact. Although capacitors are perhaps the subject of greatest concern because of the thin dielectric layers typically used to achieve high capacitance for a given capacitor size, insulator failure may be a problem with any device having an electrically isolated region of charge accumulating material separated from a semiconductor wafer by a thin layer of insulator material. Generally speaking, the thinner the layers of insulator material are, the more susceptible they are to breaking down.
The present invention is directed to overcoming, or at least minimizing, one or more of the problems set forth above.